In 2022, Dr. Gaoding at the UW-STREAM completed the design of a reconfigurable integrated front-end for heterogeneous sensors. In this design, three key components implemented in TSMC's 65-nm CMOS technology were described: 1) an inductor-less voltage controlled oscillator, 2) a channel acquisition filter and 3) a continuous-time (CT) Delta Sigma modulator (DSM) ADC. The three designs are implemented in TSMC's 65-nm CMOS technology. To reduce the size and footprinting, the VCO design relied on an active inductor. The low-power gm-C based channel selection filter can achieve a wide passband from 60 kHz to 2.5 MHz with an almost constant Q-factor equal to 7.2. Finally, a 4th-order continuous-time Delta/Sigma analog-to-digital converter (ADC) provides high resolution, and requires lower power compared with existing solutions. It has a 2-MHz bandwidth with an effective number of bits equal to 12.8 bits.
With Nautel, we are developing a digital pre-distortion (DPD) algorithm that is tested using a software defined radio. To model the transmitter front-end, it is modelled with a nonlinear polynomial with memory and the DPD coefficients are computed using a regressive least square algorithm. A real-time implementation is in progress on a Field Programmable Gate Array.
In this work, a digital processor on CMOS technology is being developed to monitor the acoustic spectrum and infer trends in climate change using a low cost acoustic sensor. Specifically, long-term acoustic recordings are analyzed from a wide variety of water depths and locations to develop a robust soundscape classification algorithm. For each minute of data, the wind speed is estimated using a cubic function of power spectral density (PSD) at 6 kHz and recording depth. The classification algorithm employs the PSD level at twelve frequencies in the range of 0.03-30 kHz, as well as spectral slopes and kurtosis to identify minutes with rain, drizzle, heavy and light shipping, fin and blue whales, as well as odontocete clicks and whistles. The intent is to provide a low-power system that can be operated on autonomous platforms. A proof-of-concept for the classification algorithms has been embedded on a processor using Xilinx’s Zynq System-on-Chip that produces a 32-kHz hybrid millidecade spectrum in real-time, and the firmware is being converted for synthesis using a mature 180-nm CMOS fabrication process offered by TSMC.
During his PhD, Prof. Bousquet integrated different parametric amplification topologies on CMOS technology. This included a negative resistance amplifier to act as an active scatterer and control the fading conditions in a rich scattering environment. The parametric amplifier has interesting applications to amplify the quantum signal, since it can offer a very low noise figure. A parametric amplifier was fabricated on VTT’s Niobium superconductor process and its performance will be characterized in the Summer 2023, with the support of Invest Nova Scotia.
